McClain Electronics Engineering

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McClain Electronics Engineering We do product design and development, specializing in aerospace and space applications.

Selecting the right high-current PCB power connector is about more than finding a component with the appropriate current...
10/20/2026

Selecting the right high-current PCB power connector is about more than finding a component with the appropriate current rating. It requires a careful balance of electrical performance, thermal management, mechanical retention, PCB layout, and environmental qualification.

Our team recently evaluated multiple connector families to identify a suitable right-angle, PCB-mounted solution for an RPDU application.

Key engineering considerations included:

-Current-carrying capability and contact resistance
-PCB mounting orientation and space constraints
-Mechanical retention and locking mechanisms
-Thermal performance and environmental requirements
-Automotive and military specifications, including documented qualification and test data

One of the key challenges was distinguishing advertised performance ratings from documented test results while ensuring the connector’s mechanical design aligned with the system’s requirements.

Through a structured, engineering-driven evaluation, we help identify solutions that meet application-specific requirements without unnecessary design compromises.

Reliable power distribution starts with thoughtful component selection, validated performance data, and a clear understanding of the system’s requirements.

Yesterday marked another year of doing what we love! Solving challenges, developing innovative solutions, and helping ou...
10/16/2026

Yesterday marked another year of doing what we love! Solving challenges, developing innovative solutions, and helping our customers bring their ideas to life.

We’re grateful for our amazing team, the customers who put their trust in us, and everyone who has been part of our journey. Here’s to another year of engineering, collaboration, and making great things happen!

We’re developing a UVM-based verification environment for an AXI4/AXI4-Lite-to-SPI bridge and SPI control, helping ensur...
10/15/2026

We’re developing a UVM-based verification environment for an AXI4/AXI4-Lite-to-SPI bridge and SPI control, helping ensure register transactions translate into accurate, reliable SPI communications.

From timing, data integrity, and protocol compliance to reset events, timeouts, and back-to-back transactions, we’re testing the critical corner cases before hardware integration.

With reusable verification components, automated regression testing, and coverage tracking, we’re improving design confidence and reducing debugging time.

10/13/2026

Getting humans and cargo safely to the Moon starts with precision engineering.

We’re working on the mechanical features and enclosure for a lunar LiDAR altimeter designed to map the lunar surface and support safer landings.

Maintaining precise alignment of the transmit and receive lasers and lenses while minimizing mass can be challenging.

As lunar exploration advances, this technology can help pave the way for transporting people, equipment, and infrastructure to support future missions and a sustained human presence on the Moon.

Our team is designing a high-side current-sense filter for an RPDU using the INA225AQDGKRQ1. While the datasheet provide...
10/09/2026

Our team is designing a high-side current-sense filter for an RPDU using the INA225AQDGKRQ1. While the datasheet provides a recommended filter configuration, selecting the right component values requires looking beyond the schematic.

Too little filtering can let switching noise and transients impact the measurement. Too much can slow the response and potentially hide meaningful current transients.

We evaluated the recommended configuration and its response to find the right balance between noise rejection and measurement speed, a critical tradeoff when designing the analog front end of a current-sensing circuit.

We’re currently developing an AXI4-Lite NOR Flash Controller IP for FPGA-based systems, providing software-controlled ac...
10/06/2026

We’re currently developing an AXI4-Lite NOR Flash Controller IP for FPGA-based systems, providing software-controlled access to one or two SPI NOR Flash devices through a standardized memory-mapped interface.

The interesting part? Bridging two very different worlds: AXI4-Lite’s independent transaction channels and SPI Flash’s precise command, address, data, and timing requirements.

The design supports the full 256 MiB address range of the Micron MT25QL02G, including 3- and 4-byte addressing, FIFO operations, program/erase management, busy polling, timeouts, error handling, and dual-device operation.

This eliminates processor-side SPI bit-banging while enabling reliable Flash access for FPGA configuration, firmware updates, parameter storage, event logging, and redundant storage.

High-speed signals demand more than just a connection, they demand control.Controlled-impedance PCB traces help prevent ...
10/02/2026

High-speed signals demand more than just a connection, they demand control.

Controlled-impedance PCB traces help prevent reflections, ringing, noise, timing issues, and signal degradation that can cause intermittent failures at high data rates.

Our engineers carefully consider trace width, stackup, dielectric thickness, reference planes, differential-pair spacing, vias, and routing length to maintain signal integrity from source to destination.

Because at high speed, every detail in the layout matters.

We developed a reusable AXI SPI FRAM Controller IP that bridges AXI-based FPGA systems with external SPI FRAM, handling ...
09/30/2026

We developed a reusable AXI SPI FRAM Controller IP that bridges AXI-based FPGA systems with external SPI FRAM, handling SPI transactions, command sequencing, timing, and device protocols in hardware.

The result? A compact, configurable IP core that reduces software overhead and simplifies reliable storage for configuration data, calibration values, event logs, and system state.

Designed for reuse across FPGA platforms, with a roadmap toward QSPI, DMA, security features, and software drivers.

Less integration effort. More reusable hardware.

FPGA pin assignment isn’t always as simple as connecting signals where they fit. In one recent design effort, we needed ...
09/25/2026

FPGA pin assignment isn’t always as simple as connecting signals where they fit. In one recent design effort, we needed to assign FPGA pins that were not orthogonally adjacent to one another while also ensuring their corresponding bond wire pads were not adjacent.

Why? To help reduce the potential for shorting issues during environmental testing.

Finding enough pins that satisfied both requirements took multiple iterations and careful analysis. To make the process more efficient, we developed an algorithm that visually maps each FPGA pin to its corresponding bond wire pad. Selecting a pin draws a line to its mapped pad, making the relationships much easier to evaluate and verify.

The image shows the FPGA pin portion of the tool; the bond wire pad portion is vendor proprietary.

Sometimes the best engineering solution starts with making a complex problem easier to see.

Our team developed and executed a complete packaging and shipment plan for a custom electronics test system supporting f...
09/22/2026

Our team developed and executed a complete packaging and shipment plan for a custom electronics test system supporting four different test configurations.

The system included sensitive electronics, rack-mounted equipment, precision fixtures, mechanical assemblies, test cables, and supporting hardware each requiring a different protection strategy.

We designed the shipment around ESD protection, impact resistance, mechanical blocking, padding, edge protection, strapping, palletization, and organized configuration identification.

The result? A coordinated packaging approach designed to protect the system during transportation while making reassembly and setup at the customer site efficient and straightforward.

Because engineering the solution also means engineering how it gets there.

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7586 W Jewell Avenue, Suite 102
Lakewood, CO
80127

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